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UCIe: An Open Standard for Package-Level Innovations in Computing Systems

SNIAVideo via YouTube

Overview

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Watch a 27-minute conference talk from the SNIA Compute+Memory+Storage Summit exploring UCIe (Universal Chiplet Interconnect Express), an open industry standard for package-level innovations. Discover how high-performance workloads in AI, machine learning, data analytics, 5G, automotive, and high-performance computing are driving demands for on-package integration of heterogeneous processing units, memory, and communication infrastructure. Learn about the critical role of on-package interconnects in delivering power-efficient performance, and understand how UCIe enables plug-and-play interoperability of chiplets similar to established standards like PCI Express®, USB®, and CXL®. Gain insights into various technology choices, key metrics, different architectural layers, software models, and compliance mechanisms as presented by Dr. Debendra Das Sharma from the UCIe Consortium. Follow the evolution from off-package load-store interconnects to the comprehensive UCIe 1.0 specification, including its implementation in standard and advanced packages, SoC-level usage models, and off-package connectivity with retimers.

Syllabus

Intro
Explosion of data enabling data-centric revolution
Off-Package Load-Store Interconnects: PCle and CXL
Motivation for UCle
Ucle: Key Metrics and Adoption Criteria
Jumpstarting UCle
Ucle 1.0: Supports Standard and Advanced Packages
Ucle Usage Model: SoC at Package Level
UCIe Usage: Off-package connectivity w/ Retimers

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SNIAVideo

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