Overview
Explore a 12-minute conference presentation from USENIX Security '24 that introduces SpecLFB, an innovative hardware defense mechanism designed to eliminate cache side-channel attacks in speculative executions. Learn how researchers from Southeast University and Chongqing University developed a solution utilizing the Line-Fill-Buffer microarchitecture component integrated with a load security check mechanism. Discover the implementation of ROB unsafe mask structure for tracking instruction states and how the system optimizes performance by narrowing protection scope for unsafe speculative loads. Examine the practical implementation in RISC-V core SonicBOOM and Gem5, including FPGA hardware prototyping running Linux-kernel-based OS. Understand how this solution achieves effective defense against attacks while maintaining minimal hardware resource overhead of 0.6% and performance overhead between 1.85% and 3.20% based on comprehensive evaluations through RTL simulation, FPGA prototype experiments, and Gem5 simulation.
Syllabus
USENIX Security '24 - SpecLFB: Eliminating Cache Side Channels in Speculative Executions
Taught by
USENIX