Explore a Stanford seminar on the REX Neo Architecture, a groundbreaking energy-efficient processor design that challenges traditional computing paradigms. Delve into the innovative features of the Neo64 Instruction Set Architecture, including its minimalist approach, VLIW implementation, and scratchpad memory. Discover how the Neo Core prioritizes computational efficiency and how the Neo Network on Chip enhances scalability. Learn about the rapid development process, from concept to tapeout, and the integration of Kandou Bus Glasswing technology. Examine the REX Computing Engineering Timeline and the Cadence Design Flow's role in optimizing performance, power, and area. Gain insights into the Neo Development Environment, high-performance simulation techniques, and extensible debugging and profiling tools. Understand how REX efficiency surpasses competitors by over a decade and explore the potential for future improvements in power efficiency. Conclude with a discussion on semiconductor economics and an introduction to the advisory board.
Stanford Seminar - The REX Neo Architecture - An Energy Efficient New Processor Architecture
Stanford University via YouTube
Overview
Syllabus
Introduction.
Meet Team REX.
REX Neo: A new approach to efficient computing redefines how processors are designed and where computing occurs..
Current processors were designed for an old paradigm. Floating Point Operation Energy Consumption.
Introducing the REX Neo Architecture.
REX Neo is a complete modern computing solution.
Neo64 is a minimalist Instruction Set Architecture..
VLIW?! Scratchpad?! That's madness!.
The Neo64 ISA maximizes instruction level parallelism along with code density.
Each Neo Core prioritizes computational efficiency..
The Neo Network on Chip maximizes scalability.
Neo 16 core demo: Concept to Tapeout in 6 months.
Kandou Bus Glasswing: Chord Sirnaling Serializer/Deserializer.
Kandou Bus Glasswing: Chord Signaling Serializer/Deserializer.
REX Computing Engineering Timeline.
Cadence Design Flow allowed for rapid design changes to optimize for PPA.
The Neo Development Environment simplifies programming.
Accurate High Performance Simulation without compromise.
Library support eases porting of common functionality.
Extensible Debugging and Profiling.
REX efficiency is 10+ years ahead of competitors..
Continuing to improve power efficiency anticipates design and process improvements..
Semiconductor Economics.
Advisory Board.
Taught by
Stanford Online
