Software Defined Memory with CXL and Tiered Memory for Hyperscale Use Cases

Watch a 57-minute technical presentation exploring Software-Defined Memory (SDM) architecture and its implementation in hyperscale environments. Dive into the emerging HW-SW co-design architecture paradigm that addresses increasing memory capacity and bandwidth demands for AI/ML and database applications. Learn about memory resource optimization in cloud infrastructure through dynamic provisioning and unified memory namespace pooling. Explore how different applications leverage various memory tiers (DDR, SCM, HBM) and CXL interconnect technologies within the SDM framework. Understand the ongoing kernel-level software developments, benchmark demonstrations for caching, and practical implementations in hyperscale use cases. Gain insights from industry experts about Linux kernel tiering, memory management, and real-world applications through demonstrations using Intel's 4th Gen Xeon Processor.