RISC-V IRQ Bypass Implementation for KVM

Explore the implementation of irqbypass for RISC-V KVM in this technical conference talk. Delve into the architecture-specific challenges of enabling irqbypass for RISC-V, focusing on the novel support provided by AIA and IOMMU specifications for guest interrupt delivery. Examine the proposed approach, which involves the RISC-V IOMMU driver implementing an IRQ domain to provide irq_set_vcpu_affinity(). Discuss the implications of RISC-V IOMMU sending notice MSIs for guest vIMSICs backed by MRIFs, and consider the need for new user API to manage policy selection for notice MSI delivery. Address the performance differences in irqbypass between guests with assigned interrupt files and those with MRIFs, exploring potential modifications to improve measurement accuracy. Gain insights into ongoing design decisions and developments in the proof-of-concept implementation of RISC-V irqbypass with KVM.