Course abstract: An embedded system (ES) can be described as a computing system which is part of a larger physical system. Examples of ESs range from a simple elevator controller to a complex avionics control system. Unlike a general purpose computer system, ESs are typically designed for specific functionalities, often with stringent performance objectives and constraints related to real-time accuracy, area, power, cost etc. Their implementations may include both software and hardware components and may necessitate integration with sensors and actuators. The increase in complexity of modern ESs mandates automation in their design. Given a system which we intend to implement, the design process majorly evolves through distinct but often overlapping and iterative phases which include, i. modeling of the intended system behavior, ii. design of appropriate structural representations and implementation methodologies, corresponding to the specified behavior, iii. verification and validation of the correctness and performance related properties that the designed system should satisfy, and iv. testing whether the prototyped/manufactured implementation actually performs the required behaviour. The proposed course will systematically cover all these topics so that the student gains an end-to-end understanding of the overall ES design process.
Embedded Systems - Design Verification and Test
NPTEL and Indian Institute of Technology Guwahati via YouTube
Overview
Syllabus
Embedded Systems - Design Verification and Test [Introduction Video].
Introduction.
Modeling Techniques – 1.
Modeling Techniques – 2.
Hardware/Software Partitioning - 1.
Hardware/Software Partitioning - 2.
Introduction to Hardware Design.
Hardware Architectural Synthesis – 1.
Hardware Architectural Synthesis – 2.
Hardware Architectural Synthesis – 3.
Hardware Architectural Synthesis – 4.
Hardware Architectural Synthesis – 5.
Hardware Architectural Synthesis – 6.
Hardware Architectural Synthesis – 7.
System Level Analysis.
Uniprocessor Scheduling – 1.
Uniprocessor Scheduling – 2.
Multiprocessor Scheduling – 1.
Multiprocessor Scheduling – 2.
Introduction and Basic Operators of Temporal Logic.
Syntax and Semantics of CTL.
Equivalence between CTL formulas.
Model Checking Algorithm.
Binary Decision Diagram.
Use of OBDDs for State Transition System.
Symbolic Model Checking.
Introduction to Digital VLSI Testing.
Automatic Test Pattern Generation (ATPG).
Scan Chain based Sequential Circuit Testing.
Software-Hardware Co-validation Fault Models and High Level Testing for Complex Embedded Systems.
Testing for embedded cores.
Bus and Memory Testing.
Testing for advanced faults in Real time Embedded Systems.
BIST for Embedded Systems.
Concurrent Testing for Fault tolerant Embedded Systems - 1.
Concurrent Testing for Fault tolerant Embedded Systems - 2.
Testing for Reprogrammable hardware.
Interaction Testing between Hardware and Software.
Taught by
NPTEL IIT Guwahati
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Reviews
5.0 rating, based on 1 Class Central review
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Ashwini Maddithe course is very structured and rich of valuable information regarding embedded development, as a embedded software engineer I recommend this course to anyone wants to start a career in this field. as said in the lectures these notions could be translated to a major scale for complex projects.
