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Arm V1
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Classroom Contents
Enabling Next-Generation Processor Simulations with SimEng - NHR PerfLab Seminar
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- 1 Introduction
- 2 Steves background
- 3 SimEng advantages
- 4 Asimov project
- 5 Ideal processor
- 6 Design space exploration
- 7 Design goals
- 8 Marvel Thunder X2
- 9 YAML files
- 10 Other models
- 11 Current work
- 12 HPC Benchmarks
- 13 Instruction Trace Viewer
- 14 Lark
- 15 Vector designs
- 16 Vector widths
- 17 Linear algebra kernels
- 18 DGM
- 19 Arm V1
- 20 Scalable Matrix Extension
- 21 A64FX Extension
- 22 Resnet
- 23 Future plans
- 24 Conclusions
- 25 Funding
- 26 Questions
- 27 Template magic
- 28 Simplicity
- 29 Configuration
- 30 Floating Point Operations
- 31 SimEng Code
- 32 Memory Traffic
- 33 Manual Work
- 34 Documentation
- 35 Reverse Engineering
- 36 Usability
- 37 Ease of use
- 38 Build a static binary
