How to Simulate PCIe and IEEE Paths on PCB - Essential Channel Simulation Guide

How to Simulate PCIe and IEEE Paths on PCB - Essential Channel Simulation Guide

Robert Feranec via YouTube Direct link

Simulation and results

19 of 23

19 of 23

Simulation and results

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How to Simulate PCIe and IEEE Paths on PCB - Essential Channel Simulation Guide

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  1. 1 What is this video about
  2. 2 What is channel and why to simulate it
  3. 3 Why is loss important
  4. 4 Stackup
  5. 5 Dielectric properties Df Dk
  6. 6 Copper roughness
  7. 7 Construction tables and stackup
  8. 8 10 layer stackup example
  9. 9 When start worrying about stackup details
  10. 10 Copper Roughness models
  11. 11 Filling up Stackup into Polar software
  12. 12 Setting up Dk and roughness
  13. 13 Calculating Loss of a transmission line for stackup in Polar
  14. 14 Saving model of transmission line
  15. 15 Creating models of VIAs
  16. 16 Dielectric anisotropy
  17. 17 DesignCon
  18. 18 Creating and setting up simulation
  19. 19 Simulation and results
  20. 20 Comparing good and bad PCB material results
  21. 21 COM - Channel Operating Margin
  22. 22 Setting up COM simulation
  23. 23 COM results

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