Black Friday 2024: 25+ Ways to Save on Online Learning
Adjusting Network-on-Chip Topologies for Design Goals and Architectures

Adjusting Network-on-Chip Topologies for Design Goals and Architectures

Scalable Parallel Computing Lab, SPCL @ ETH Zurich via YouTube Direct link

Motivation: The Challenges

2 of 7
Previous
Next

2 of 7

Motivation: The Challenges

Class Central Classrooms beta

YouTube videos curated by Class Central.

Classroom Contents

Adjusting Network-on-Chip Topologies for Design Goals and Architectures

Automatically move to the next video in the Classroom when playback concludes
  1. 1 Introduction: Why Network-on-Chip?
  2. 2 Motivation: The Challenges
  3. 3 Design Principles for NoC Topologies
  4. 4 The Sparse Hamming Graph Topology
  5. 5 Cost and Performance Prediction Toolchain
  6. 6 Evaluation: Challenges Solved!
  7. 7 Conclusion

Never Stop Learning.

Get personalized course recommendations, track subjects and courses with reminders, and more.

Sign up for free
Someone learning on their laptop while sitting on the floor.