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Adjusting Network-on-Chip Topologies for Design Goals and Architectures

Adjusting Network-on-Chip Topologies for Design Goals and Architectures

Scalable Parallel Computing Lab, SPCL @ ETH Zurich via YouTube Direct link

Introduction: Why Network-on-Chip?

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Introduction: Why Network-on-Chip?

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Adjusting Network-on-Chip Topologies for Design Goals and Architectures

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  1. 1 Introduction: Why Network-on-Chip?
  2. 2 Motivation: The Challenges
  3. 3 Design Principles for NoC Topologies
  4. 4 The Sparse Hamming Graph Topology
  5. 5 Cost and Performance Prediction Toolchain
  6. 6 Evaluation: Challenges Solved!
  7. 7 Conclusion

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