CPU Architecture Courses and Certifications

ChariotSolutions

Journey to the Centre of the JVM - Exploring CPU Architecture and Memory Models

Explore CPU architecture, memory models, and JVM intrinsics through functional abstractions, unraveling a complex bug in Scala implementation across different hardware.

• YouTube
• 59 minutes
• On-Demand
• Free Video

Ben Eater

How Hardware Timers Work in CPUs

Explore CPU hardware timers: their function, implementation, and role in controlling execution timing. Gain insights into low-level computer architecture and timing mechanisms.

• YouTube
• 31 minutes
• On-Demand
• Free Video

Ben Eater

8-Bit CPU Control Logic - Part 1

Explore the creation of a custom machine language and learn how control logic executes programs in an 8-bit CPU, providing insights into low-level computer architecture.

• YouTube
• 28 minutes
• On-Demand
• Free Video

TheIACR

Co-Design and Co-Verification of Masked Software Implementations on CPUs

Explore co-design and co-verification of masked software implementations on CPUs, focusing on physical side-channel attacks, hardware/software gaps, and innovative solutions.

• YouTube
• 25 minutes
• On-Demand
• Free Video

CPU Feature Management: Lessons from Trenches

Explore CPU feature management challenges in heterogeneous hardware clustering, including migration issues, feature deprecations, and contrasting interpretations between Intel and AMD.

• YouTube
• 27 minutes
• On-Demand
• Free Video

ChibiAkumas

Switching Between 16-bit Z80 and 24-bit eZ80 (ADL) Mode - Lesson 2

Explore switching between 16-bit Z80 and 24-bit eZ80 (ADL) modes, covering mixed modes and their complexities in assembly programming.

• YouTube
• 26 minutes
• On-Demand
• Free Video

cpponsea

What Do You Mean by Cache Friendly - Optimizing Data Structures for CPU Performance

Explore cache-friendly data structures and algorithms in C++. Learn techniques to analyze and improve cache efficiency, optimizing performance through memory layout and access patterns.

• YouTube
• 1 hour 17 minutes
• On-Demand
• Free Video

DPDK Project

Extending For_each_lcore for Hardware Topology LCORE - Achieving Higher Performance

Discover how to optimize processor performance through topology-aware LCORE listing, focusing on pkt-distributor, event-dev and pipeline libraries for enhanced payload processing.

• YouTube
• 35 minutes
• On-Demand
• Free Video

code::dive conference

Inside CPUs and GPUs: Architecture, Performance, and Security Implications

Dive into the inner workings of CPUs and GPUs, exploring architecture, caches, predictions, and security implications while discovering practical tools and real-world examples of hardware vulnerabilities.

• YouTube
• 45 minutes
• On-Demand
• Free Video

Architecting Tomorrow: The Heterogeneous Compute Resources for New Types of Workloads

Dive into modern hardware architecture optimization for Kubernetes workloads, exploring CPU internals, memory types, and resource allocation strategies for enhanced performance and energy efficiency.

• YouTube
• 34 minutes
• On-Demand
• Free Video

Functional Programming using C++

643 ratings at Udemy

Write more robust and easier to maintain C++ code than ever before.

• Udemy
• 1 hour 35 minutes
• On-Demand
• Paid Course

Assembly Language Programming for Reverse Engineering

316 ratings at Udemy

Understand assembly code and modify exe files to add new functionality using x64dbg

• Udemy
• 15 hours 7 minutes
• On-Demand
• Paid Course

Mastering x86-64 Real Assembly Language from Zero | ASM+

177 ratings at Udemy

Every Code is Open Source if you know ASSEMBLY Programming | Reverse Engineering, Ethical Hacking, Windows, Linux, MP...

• Udemy
• 20 hours 26 minutes
• On-Demand
• Paid Course

Computer Organization and Architecture - Part 3

164 ratings at Udemy

Learn Computer Organization and Architecture of Computer Science in the most simplified manner

• Udemy
• 12 hours 54 minutes
• On-Demand
• Paid Course

Building a Processor with Verilog HDL from Scratch

161 ratings at Udemy

Master custom processor design in Verilog HDL, from implementing instruction sets to adding memory and branching capabilities. Build efficient CPUs optimized for FPGA resources and modern computing needs.

• Udemy
• 3 hours
• On-Demand
• Paid Course