High Performance Computer Architecture

Overview

This class is offered as CS6290 at Georgia Tech where it is a part of the Online Masters Degree (OMS). Taking this course here will not earn credit towards the OMS degree.

The course begins with a lesson on performance measurement, which leads to a discussion on the necessity of performance improvement.

Pipelining, the first level of performance refinement, is reviewed. The weaknesses of pipelining will be exposed and explored, and various solutions to these issues will be studied. The student will learn hardware, software, and compiler based solutions to these issues.

Syllabus

Introduction and Trends

Computer Architecture & Tech Trends,Moore's Law,Processor Speed, Cost, Power,Power Consumption,Fabrication Yield

Performance Metrics and Evaluation

Measuring Performance,Benchmarks Standards,Iron Law of Performance,Amdahl's Law,Lhadma's Law

Pipelining Review

Pipeline CPI,Processor Pipeline Stalls,Data Dependencies,Pipelining Outro

Branches

Branch Prediction,Direction Predictor,Hierarchical Predictors,PShare

Predication

If Conversion,Conditional Move,MOVc Summary

Instruction Level Parallelism (ILP)

ILP Intro,RAW Dependencies,WAW Dependencies,Duplicating Register Values,Instruction Level Parallelism (ILP)

Instruction Scheduling

Improving IPC,Tomasulo's Algorithm,Load and Store Instructions

ReOrder Buffer

Exceptions in Out Of Order Execution,Branch Misprediction,Hardware Organization with ROB

Memory Ordering

Memory Access Ordering,When Does Memory Write Happen,Out of Order Load Store Execution,Store to Load Forwarding,LSQ, ROB, and RS

Memory

How Memory Works,One Memory Bit SRAM,One Memory Bit DRAM,Fast Page Mode,Connecting DRAM To The Processor

Multi-Processing

Flynn's Taxonomy of Parallel Machines,Multiprocessor Needs Parallel Programs!,Centralized Shared Memory,Distributed Shared Memory,Message Passing Vs Shared Memory,Shared Memory Hardware,SMT Hardware Changes,SMT and Cache Performance