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Explore a cutting-edge approach to enhancing data integrity in modern computing systems through this 15-minute conference talk from USENIX Security '23. Delve into HashTag, a novel hash-based integrity protection method for tagged architectures, presented by researchers from Graz University of Technology. Learn how compact error-correcting codes based on low-latency hashing functions can provide robust probabilistic error detection and correction while enabling ECC bit repurposing. Discover how this innovative design significantly reduces undetected errors and facilitates efficient implementation of tagged memory architectures like CHERI, ARM MTE, and SPARC ADI. Gain insights into the systematic analysis of schemes allowing memory tagging on cache line granularity while maintaining error detection and correction capabilities in multi-bit fault scenarios. Understand the potential of this approach to store additional tags per cache line without compromising error correction capabilities, opening new possibilities for implementing advanced memory protection techniques.