Explore hardware security validation techniques in this IEEE conference talk on Transys, a system for leveraging common security properties across hardware designs. Learn about the challenges of developing security properties, the concept of design equivalence, and how Transys overcomes structural dissimilarities between designs. Discover methods for finding counterparts in different designs, using Program Dependence Graphs (PDG) to capture analogous relationships, and refining constraints to make properties valid. Gain insights into generating valid assertions for new designs, understanding semantic equivalence, and translating properties at scale. Delve into the rising concerns of hardware vulnerabilities and the importance of efficient security validation in modern hardware development.
Transys - Leveraging Common Security Properties Across Hardware Designs
Overview
Syllabus
Intro
Rise of Hardware Vulnerabilities
Hardware Security Validation
Developing Security Properties is Challenging
Problem Statement
What "Equivalence" Means
Transys: Overview
How to find the counterparts in the second design?
Finding counterparts by statistically matching features
How to overcome structural dissimilarities between designs?
Using PDG to capture the analogous relationship
How to make the property valid in the second design?
Making the property valid by refining constraints
Refining constraints with a sequence of conjuncts
How to find the sequence of conjuncts?
Finding the conjuncts in conflict clauses
Generate valid assertions for the new designs
Semantic Equivalence and Translation Examples
Translate at the scale of minutes
Summary
Taught by
IEEE Symposium on Security and Privacy
