Overview
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Explore the state of hardware and software ecosystems for low-power machine learning applications on RISC-V in this comprehensive tinyML talk. Gain insights into the latest RISC-V ISA specifications and upcoming standard extensions. Survey available open-source and proprietary commercial implementations, including processor cores, SoCs, and boards suitable for low-power applications. Delve into the current software support for RISC-V, identifying gaps and opportunities for open-source contributors to accelerate growth and adoption. Learn about RISC-V architecture, base ISA, cores, developer boards, and software ecosystems. Compare RISC-V with ARM, discuss frontend integration, platforms, and extensions. Receive advice on Android development for RISC-V, understand the differences between ISA and micro-architecture, and explore optimization techniques for hardware designers.
Syllabus
Introduction
Instruction Set Architecture
RISCV Architecture
RISCV Specification
RISCV Base ISA
RISCV Cores
RISCV Developer Board Program
RISCV Software Ecosystem
RISCV Community
Questions
RISCV vs ARM
Frontend integration
RISCV Platforms
RISCV Extension
Advice
Android on RISCV
ISA vs Micro Architecture
Optimizations
Micro Architecture
Hardware Designer
Taught by
tinyML