Innovating the Next Discontinuity in HPC and AI Computing
Scalable Parallel Computing Lab, SPCL @ ETH Zurich via YouTube
Overview
Explore a thought-provoking talk by Robert Wisniewski on the future of high-performance computing (HPC) and artificial intelligence (AI) applications. Delve into the current bottlenecks facing classical HPC and AI applications, focusing on memory bandwidth and communication bandwidth limitations. Discover the concept of Memory Couple Compute, a proposed solution for tightly integrating memory and compute to achieve the next level of exponential performance increase. Examine the research being conducted to design hardware and software architectures that address these challenges and potentially create the next discontinuity in HPC and AI. Gain insights into the key trends shaping the future of post-exascale computing and the interesting design space that needs to be considered to make this innovative architecture a reality.
Syllabus
[SPCL_Bcast] Innovating the Next Discontinuity
Taught by
Scalable Parallel Computing Lab, SPCL @ ETH Zurich