Explore a comprehensive conference talk on securing Intel SGX against Hyper-Threading side-channel attacks. Delve into the innovative HYPERRACE tool, which creates shadow threads and employs contrived data races to verify physical-core co-location without relying on a trustworthy clock. Learn about the challenges, implementation, and security analysis of this LLVM-based solution that aims to eradicate Hyper-Threading side channels in SGX enclave programs. Gain insights into the tool's performance, its ability to detect exception- and interrupt-based side channels, and its implications for enhancing the security of SGX enclaves.
Racing in Hyperspace - Closing Hyper-Threading Side Channels on SGX
Overview
Syllabus
Intro
Intel SGX
Hyper-Threading enabled side channels
Hyper-Threading assisted side channels
Challenges
HyperRace overview
Contrived data race: an illustrating example
A refined data-race design
Co-Location Test via Hypothesis Testing
Co-Location Test code
Security requirements
Security analysis
Implementation
Performance
Discussion and conclusion
Taught by
IEEE Symposium on Security and Privacy
