PCIe Active Electrical Cables (AECs) for Large Language Model (LLM) Computing Clusters

Learn about the evolution and implementation of active electrical cables (AECs) with retimers in a technical presentation from industry experts at Molex and Astera Labs. Explore how the drive for cost-effective copper-based solutions in 112G and 224G PAM4 ethernet applications has led to innovations in PCIe connectivity. Discover the challenges and considerations in adapting retimer technology for GPU and accelerator clustering in Large Language Model (LLM) computing, including detailed comparisons between PCIe and Ethernet protocols. Examine key technical aspects like retimer implementation in CDFP form factors, evaluate the pros and cons of alternative formats like OSFP-XD, and understand the distinct requirements for retimer deployment in PCIe versus Ethernet applications.