Keeping Pace: Micro-Models, Large Language Models, and the Co-Evolution of Chip and Data Center Design in a Rapidly Shifting AI Landscape

Watch a keynote presentation from the Hot Interconnects Symposium where NeuralFabric CTO Mark Baciak explores the dynamic relationship between micro-models, large language models, and the evolving landscape of chip and data center design. Delve into how these technologies are co-evolving in response to rapid advancements in artificial intelligence. Learn about the challenges and opportunities in keeping pace with the accelerating demands of AI systems, examining both the architectural implications for chip design and the broader impact on data center infrastructure. Gain insights into the technical considerations and trade-offs involved in developing efficient computing solutions for both smaller-scale micro-models and resource-intensive large language models.