Chiplet-Based Compressed LLC Cache and Memory Expansion for Data Centers

Learn about hardware-accelerated memory compression technology in this 16-minute technical talk from the Open Compute Project. Explore how memory chiplets, including HBM, non-volatile, and DDR memory over CXL, along with LLC cache chiplets address memory and SRAM scaling challenges in data centers and smart devices. Discover a novel chiplet IP solution that achieves 2-4X real-time memory compression with sub-10ns latency at cache line granularities, making memory/cache Total Cost of Ownership more economical without sacrificing performance. Examine the integration of this technology with a high-speed coherent mesh network for enhanced resource management and efficiency. Gain insights into architectural components that work with existing chiplet ecosystems to reduce adoption barriers in Cloud, Hyperscale, and Automotive applications. Understand opportunities for collaboration within the OCP ODSA Community and explore solutions to challenges in disaggregated coherent memory chiplet deployment.