Overview
Syllabus
Intro
Example: Linux
Example: town. OS X 10.10.5 Kernel Privilege Escalation Vulnerability
Kernel Address Space Layout Randomization (KASLR)
TLB Timing Side Channel
TSX Gives Better Precision on Timing Attack
Transactional Synchronization Extension
Abort Handler Suppresses Exceptions
Reducing Noise with Intel TSX
Measuring Timing Side Channel
Demo 2: Full Attack on Linux
Attack on Windows
Attack on OS X
Attack on Amazon EC2
Result Summary
Timing Side Channel (M/U)
Path for a mapped Page
Intel Cache Architecture
Path for an Executable Page
Path for a non-executable, but mapped Page
Cache Coherence and TLB
Discussions: Controlling Noise
Discussions: Countermeasures?
Conclusion
Any Question?
Taught by
Black Hat