Learn about a proposed API for cache stashing hints in this technical presentation from Arm engineers. Explore how DPDK applications can gain fine-grained control over CPU cache utilization through TLP Processing Hints (TPH) capability, which has been part of PCI Express specifications since revision 3.0. Discover how the proposed ethdev library level API enables applications to provide hints to Poll Mode Drivers, which then translate to platform steering bits for directing I/O towards specific CPUs and cache hierarchy levels. While Intel's Data Direct I/O improves NIC to CPU latencies, understand how this new API approach could give developers more precise control over cache memory utilization by leveraging existing technologies and implementations in Network Interface Cards and interconnects.
Overview
Syllabus
An API for Cache Stashing Hints - Wathsala Vithanage & Honnappa Nagarahalli, Arm
Taught by
DPDK Project