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Tsinghua University

数字集成电路分析与设计

Tsinghua University via XuetangX

Overview

本课程主要从晶体管级和电路级讲授数字集成电路的分析与设计。以CMOS集成电路为主,从回顾基本的集成电路器件开始,讲述CMOS反相器、组合逻辑电路、时序逻辑电路分析设计、算术运算逻辑功能部件、互连线模型和互连线寄生效应,并介绍常用数字集成电路设计方法和流程,重点针对数字集成电路基本单元的各种电路类型,从电路结构原理及其面积、速度、功耗等方面进行分析和设计优化。

Syllabus

  • Hspice
    • 1
  • Introduction and Implementation Strategies for Digital IC
    • 1.Introduction to Digital IC
    • 2.Architecture of Digital Processor
    • 3.Full Custom Design Methodology
    • 4.Semicustom Design Methodology
    • 5.Quality Metric of Digital IC
    • 6.Summary and Textbook Reference
    • 7.PPT
  • The Devices
    • Key Points Review of Last Lecture
    • 1.Introduction
    • 2.The Diode
    • 3.The MOSFET Transistor
    • 4.Secondary Effects
    • 5.Summary and Textbook Reference
    • 6.PPT
  • The CMOS Inverter I
    • Key Points Review of Last Lecture
    • 1.Introduction
    • 2.Static Behavior
    • 3.PPT
  • The CMOS Inverter II
    • Key Points Review of Last Lecture
    • 1.Dynamic Behavior I
    • 2.Dynamic Behavior II
    • 3.Power Dissipation
    • 4. Summary and Textbook Reference
    • 5.PPT
  • Combinational Logic Circuits I
    • 1.Introduction
    • 2.Static CMOS Design I
    • 3.Static CMOS Design II
    • 4.PPT
  • Combinational Logic Circuits II
    • Key Points Review of Last Lecture
    • 1.Static CMOS Design III
    • 2.Static CMOS Design IV
    • 3.Dynamic CMOS Design
    • 4.Summary
    • 5.PPT
  • Sequential Logic Circuits I
    • 1.Introduction I
    • 2.Introduction II
    • 3. Static Latches and Registers I
    • 4.Static Latches and Registers II
    • 5.Static Latches and Registers III
    • 6.PPT
  • Sequential Logic Circuits II
    • 1.Key Points Review
    • 2.Dynamic Latches and Registers I
    • 3.Dynamic Latches and Registers II
    • 4.Dynamic Latches and Registers III
    • 5.Pulse Register
    • 6.Pipelining
    • 7.Schmitt Trigger
    • 8.Summary and Textbook Reference
    • 9.PPT
  • Designing Arithmetic Building Blocks I
    • 1. Introduction
    • 2. Adder: Full Adder (Definition)
    • 3. Adder: Circuit Design
    • 4. Adder: Logic Design I
    • 5. Adder: Logic Design II
    • 6. Adder: Summary
    • 7.PPT
  • Designing Arithmetic Building Blocks II
    • 1. Key Points Review
    • 2. Multiplier
    • 3. Shifter
    • 4. Summary and Textbook Reference
    • 5. PPT
  • The Wire
    • 1. Introduction
    • 2. Capacitance
    • 3. Resistance
    • 4. Electrical Wire Models
    • 5. Summary and Textbook Reference
    • 6. PPT
  • Coping with Interconnect
    • 1. Introduction
    • 2. Capacitive Parasitics
    • 3. Capacitive Parasitics II
    • 4. Resistive Parasitics
    • 5. Summary and Textbook Reference
    • 6. PPT
  • Assignment Solving
    • 1. Assignment Solving
    • 2. The teaching assistants want to say
  • Exercise I
    • 1. Problem 1
    • 2. Problem 2
    • 3. Problem 3
    • 4. Problem 4
    • 5. Problem 5
    • 6. Problem 6
    • 7. Problem 7
  • Exercise II
    • 1. Problem 8
    • 2. Problem 9
    • 3. Problem 10
    • 4. Problem 11
    • 5. Problem 12
    • 6. Problem 13
    • 7. Problem 14
  • 期末考试

    Taught by

    Leibo Liu

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