What you'll learn:
- How to write the VHDL code from zero
- Fundamentals of FPGA and CPLD
- Everything needed in order to become an FPGA engineer
- Solving out 6 exercises and learn by examples
- How to Simulate your VHDL design
- Upload the VHDL code to a real FPGA with development board
- VHDL structure, types, variables and how to write the code right
This VHDL Course was made by a professional electronic engineer specializes in FPGA !
In this VHDL course you will learn how to write VHDL code for FPGAs/CPLDs development and become a professional FPGA developer
No prior VHDL or FPGA knowledge is needed. This VHDL course is designed from the basic elements you need to know about VHDL code.
The VHDL course built in such way that you will learn first about the FPGAs and CPLDs structure so you will have a basic knowledge what are you going to do when you are writing a VHDL code.
Students saying:
N Venkata Bhaskar: "The course is very proper to beginner level in VHDL. you can learn a lot of topics.Excellent explanation and easy to understand examples on FPGA."
Umesh kumar Sharma: "very well explained...covered all concepts step by step with examples."
We will go through all the basic elements of the VHDL code
Starting from the VHDL code structure of a basic code to the structure of more advanced coding.
After learning about the structure you will learn about the data types, VHDL basic design units, VHDL advanced design units, VHDL statements format.
You will learn about the Clock and Resets of the FPGA and how to use them
FPGAs/CPLDs are actual components that receiving real signals from the outside world. Some of them will be synchronized signals that has a clock. You will learn how to use the clocks and the resets to sample new data and create data/communication with the outside world.
The course contains over 50 lectures that will teach you the syntax of the VHDL code
In the end of the VHDL course we will complete together 6 Exercises
You will learn how to code the VHDL by practice. Starting from the most basic VHDL code with Increasing task difficulty enhances I will show you in these videos how to write the code in the right way.
In the end of the VHDL course I will upload the last exercise code to a real FPGA! (with my Xilinx development board)
I will also show you in real-time how I can debug the code with a real time debugger which is the Integrated logic analyzer of Xilinx.
This VHDL Course was made for all levels by a professional electronic and computerengineer. with a huge experience with FPGAs of all of the companies in the market.
