Learn the fundamentals of Verilog, a popular and concise hardware description language used to create FPGA-based embedded systems.
Overview
Syllabus
Introduction
- Verilog: Your key to digital design
- What you should know
- Setting up your environment
- Hardware description languages
- Digital systems
- Levels of abstraction
- Gate level
- Register-transfer level
- Verilog modules
- Instantiating modules
- Gates and primitives
- Registers and wires
- Range specification
- Numbers and constants
- Always blocks
- The if-else statement
- Case statements
- Boolean algebra expressions
- Continuous assignments
- Blocking assignments
- Nonblocking assignments
- Challenge: From schematic to code
- Solution: From schematic to code
- Simulation basics
- Test bench modules
- Stimulus variables
- Clock generation
- Initial and always blocks
- A simple simulation
- Timing directives
- Display tasks
- Challenge: You run the show
- Solution: You run the show
- Arithmetic and logic operators
- Challenge: Make a 4-bit arithmetic logic unit (ALU)
- Solution: Make a 4-bit arithmetic logic unit (ALU)
- Getting your ALU on a field-programmable gate array (FPGA)
- A functional demo of the ALU
- Flip-flops
- Edge sensitivity
- A shift register example
- Challenge: Make a clock divider
- Solution: Make a clock divider
- Getting your clock divider on an FPGA
- A functional demo of the clock divider
- Next steps
Taught by
Eduardo Corpeño
Related Courses
-
System Design Through Verilog
-
Verilog for an FPGA Engineer with Xilinx Vivado Design Suite
-
Introducción al diseño de hardware con Verilog
4.7 -
Electrónica Digital Bit a Bit: Diseñando en Verilog para FPGA
-
Hardware Description Languages for FPGA Design
-
Electrónica Digital Bit a Bit: Fundamentos, Verilog y FPGA
