Xvisor: Embedded Hypervisor for RISC-V

Xvisor: Embedded Hypervisor for RISC-V

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Xvisor: Traditional Classification

8 of 21

8 of 21

Xvisor: Traditional Classification

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Xvisor: Embedded Hypervisor for RISC-V

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  1. 1 Western Digital
  2. 2 Roadmap
  3. 3 RISC-V H-Extension: Privilege Mode Changes
  4. 4 RISC-V H-Extension: CSR changes
  5. 5 RISC-V H-Extension Two-stage MMU
  6. 6 RISC-V H-Extension: I/O & Interrupts
  7. 7 What is Xvisor ?
  8. 8 Xvisor: Traditional Classification
  9. 9 Xvisor: Features (Contd.)
  10. 10 Xvisor: Key Aspects (Contd.)
  11. 11 Xvisor RISC-V: VCPU Context
  12. 12 Xvisor RISC-V: Host Interrupts
  13. 13 xvisor RISC-V: Context Switch
  14. 14 xvisor RISC-V: Guest MMIO Emulation
  15. 15 xvisor RISC-V: Guest RAM handling
  16. 16 Xvisor RISC-V: SBI Interface
  17. 17 xvisor RISC-V: Device tree based configuration
  18. 18 xvisor RISC-V: Zero-copy Inter-Guest Transfer
  19. 19 xvisor RISC-V: Code Size and Memory Usage
  20. 20 xvisor RISC-V: Ideal for Embedded Systems
  21. 21 xvisor RISC-V: Current State

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