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Eyeriss (JSSC 2017)
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TinyML Talks - SRAM Based In-Memory Computing for Energy-Efficient AI Inference
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- 1 Intro
- 2 ML collaboration with
- 3 Success of Deep Learning / AI
- 4 AI Algorithm & Edge Hardware
- 5 Typical DNN Accelerators
- 6 Eyeriss (JSSC 2017)
- 7 MCM Accelerator (JSSC 2020)
- 8 Bottleneck of All-Digital DNN HW Energy/Power
- 9 In-Memory Computing for DNNS
- 10 Analog IMC for SRAM Column
- 11 Analog SRAM IMC - Resistive
- 12 Analog SRAM IMC - Capacitive
- 13 ADC Optimization for IMC
- 14 Proposed IMC SRAM Macro Prototypes
- 15 Going Beyond IMC Macro Design
- 16 PIMCA: Programmable IMC Accelerator
- 17 IMC Modeling Framework
- 18 IMC HW Noise-Aware Training & Inference
- 19 Black-box Adversarial Input Attack
- 20 Pruning of Crossbar-based IMC Hardware
- 21 Acknowledgements
- 22 Contact Information
