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Prober and Handler Selection
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Classroom Contents
3D IC Test Strategy and DFT Methodologies for Advanced Packaging Technologies
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- 1 Intro
- 2 What Drives the 3D Integration?
- 3 Who are the 3D IC Players?
- 4 Semiconductor Ecosystem Mapping
- 5 Semiconductor Test Players Mapping
- 6 OSAT: IC Packaging & Test Turnkey Solution
- 7 Test Development & NPI
- 8 IC Test Fundamental
- 9 IC Test Manufacturing
- 10 3D IC Testing
- 11 Scan Test
- 12 DFT Standards
- 13 IEEE 1838 for 3D IC Stack
- 14 Boundary Scan Description Language
- 15 IJTAG Description Languages
- 16 Automatic Test Pattern Generation (ATPG)
- 17 ATE Platform Selection
- 18 Prober and Handler Selection
- 19 3D IC Test Strategy
- 20 Takeaway Conclusion
