RISC-V: The Inevitable Open Standard Architecture for Processors

RISC-V: The Inevitable Open Standard Architecture for Processors

Linux Foundation via YouTube Direct link

Keynote: RISC-V is Inevitable at the Intersect of Open Software and Hardware - Calista Redmond

1 of 1

1 of 1

Keynote: RISC-V is Inevitable at the Intersect of Open Software and Hardware - Calista Redmond

Class Central Classrooms beta

YouTube playlists curated by Class Central.

Classroom Contents

RISC-V: The Inevitable Open Standard Architecture for Processors

Automatically move to the next video in the Classroom when playback concludes

  1. 1 Keynote: RISC-V is Inevitable at the Intersect of Open Software and Hardware - Calista Redmond

Never Stop Learning.

Get personalized course recommendations, track subjects and courses with reminders, and more.

Someone learning on their laptop while sitting on the floor.