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Classroom Contents
Capture This - Real Time Packet Processing With FPGAs
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- 1 Intro
- 2 About me
- 3 Outline
- 4 Ethernet connections run at 1Gbps commonly
- 5 Von Neumann architecture
- 6 Von Neumann Bottleneck
- 7 FPGAS: a Non-Von Neumann class of devices
- 8 FPGAs: what's inside
- 9 FPGAs: Xilinx fabric families
- 10 Summarizing
- 11 Carrier Evaluation Kit
- 12 ZYNQ architecture
- 13 Useful libraries to implement network applications
- 14 Routing Network Connections
- 15 Gigabit Ethernet MAC
- 16 Towards a fully hardware implementation
- 17 Timing Constraints - Dependencies
- 18 Primary goal: the Ethernet extension cord
- 19 FPGA expansion modules
- 20 Ethernet at "ground" level
- 21 Conveyor belt model
- 22 Network Packets
- 23 Assembly chain model
- 24 Ethernet Frame structure
- 25 Preamble detector
- 26 MAC and EtherType filters - Preparation
- 27 MAC address
- 28 Search Algorithm version 1-tricotomic
- 29 MAC filter state machine
- 30 MAC and EtherType filters configuration
- 31 Demo: MAC filtering
- 32 MAC filter conclusions
- 33 EtherType filter configuration
- 34 Search Algorithm version 2
- 35 Encryption Environment
- 36 Encryption configuration
- 37 Encryption schema
- 38 Encryption architecture - "Signature"
- 39 Demo: Encryption
- 40 Demo: Decryption
- 41 Moving towards a higher level...
- 42 Achievements
- 43 Future Upgrades
- 44 Questions?
- 45 Checksum generation
