Formal Modelling and Proof in the CHERI Design and Implementation Process

Formal Modelling and Proof in the CHERI Design and Implementation Process

IEEE Symposium on Security and Privacy via YouTube Direct link

Mapping instructions to abstract actions

15 of 19

15 of 19

Mapping instructions to abstract actions

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Formal Modelling and Proof in the CHERI Design and Implementation Process

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  1. 1 Microsoft: 70% of patched vulnerabilities are memory safety issues
  2. 2 Two fundamental problems
  3. 3 Rigorous engineering for hardware security
  4. 4 CHERI: hardware support for capabilities
  5. 5 Versions of CHERI
  6. 6 Fine-grained memory protection
  7. 7 Capability manipulations
  8. 8 Scalable software compartmentalisation
  9. 9 Protection domain transitions
  10. 10 A prose architecture description
  11. 11 A formal architecture model
  12. 12 The formal specification of Cload
  13. 13 Prose security properties
  14. 14 Formal security properties
  15. 15 Mapping instructions to abstract actions
  16. 16 Property about storing data
  17. 17 Monotonicity of reachable capabilities
  18. 18 Memory isolation between compartments
  19. 19 Conclusion

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