Chip.Fail - Glitching the Silicon of the Connected World

Chip.Fail - Glitching the Silicon of the Connected World

Black Hat via YouTube Direct link

Previous work

21 of 32

21 of 32

Previous work

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Chip.Fail - Glitching the Silicon of the Connected World

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  1. 1 Intro
  2. 2 Takeaways
  3. 3 Why is this getting important?
  4. 4 Voltage glitching: Flash reads
  5. 5 Voltage glitching: RAM reads
  6. 6 Three steps to success
  7. 7 Power domains
  8. 8 Removing capacitors: Problem...
  9. 9 The chip.fail glitcher
  10. 10 Digilent Cmod A7
  11. 11 MAX PMOD
  12. 12 Hooking it up
  13. 13 The glitcher
  14. 14 FPGA Bitstream
  15. 15 Host control: Jupyter Notebook
  16. 16 Host control: Example glitcher
  17. 17 nRF52840: Test firmware
  18. 18 Glitching results
  19. 19 ESP32: Glitching
  20. 20 The 5$ Glitcher...
  21. 21 Previous work
  22. 22 STM32 Read-out Protection (RDP)
  23. 23 Dumping the bootrom
  24. 24 Let's apply our methodology
  25. 25 Bootrom Glitching
  26. 26 STM32F2 Boot process (1.4ms)
  27. 27 Power consumption after reset (200)
  28. 28 Parameters
  29. 29 Dumping the money!
  30. 30 The STM32F2 Glitcher
  31. 31 Options for defense
  32. 32 Conclusion

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