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Classroom Contents
Behind the Scenes of Intel Security and Manageability Engine
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- 1 Introduction
- 2 Jen
- 3 Hardware
- 4 PCH
- 5 ROM
- 6 Key Generation
- 7 Secure Key Storage
- 8 Kernel
- 9 TCB
- 10 BringUp
- 11 Driver
- 12 Application
- 13 Auditing Mitigation
- 14 Micro Kernel Architecture
- 15 Micro Kernel Example
- 16 Ring Free Processes
- 17 ReadOnly Page
- 18 Secondary Protection
- 19 Nonlinear Buffer Overflow
- 20 Control for Integrity
- 21 Memory Corruption
- 22 End Branch
- 23 EnbridgeUp
- 24 Compare
- 25 Segmentation
- 26 Hardening
- 27 Security Lifecycle
- 28 GOpC
- 29 Error Flow
- 30 Changing the Address
- 31 Inflating the Code
- 32 Fuzzing
- 33 FL Instrumentation
- 34 FL Bit Sizes
- 35 Pipe Memory
- 36 Test Cycle
- 37 Test API
- 38 Manufacturing
- 39 Manageability
- 40 Summary
