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Symbolic Trajectory Evaluation
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Classroom Contents
At-Scale Formal Verification for Industrial Semiconductor Designs - Professor Tom Melham
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- 1 Intro
- 2 A Modern Microprocessor
- 3 And Hard to Get Right
- 4 Back in 1985...
- 5 Advance to 2009
- 6 Back to 1985
- 7 Symbolic Trajectory Evaluation
- 8 Combination of Two Good Ideas
- 9 State Space Abstraction
- 10 Guard Expressions E
- 11 Result - Partitioned Abstraction
- 12 Key Technical Idea - Exploit Symmetry
- 13 Intel's Forte Tool
- 14 Forte Methodology
- 15 Key Drivers of Progress
- 16 Formal Verification in Practice
- 17 Problems, problems...
- 18 Region of Productivity
- 19 Life in the Region of Innovation
- 20 Example - SoC Formal Verification
- 21 Potential Roadblocks
- 22 Overcoming Roadblocks
- 23 Forte Data Points
- 24 Region of Research?
- 25 Software - A Much Bigger Problem
- 26 Embedded Software
- 27 Working Definition
- 28 Effective Validation of Low-Level Firmware
- 29 Ongoing Work
