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INTEL TDX-HIGH LEVEL SECURITY GOAL OF ARCHITECTURE
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Architectural Extensions for Hardware Virtual Machine Isolation to Advance Confidential Computing in Public Clouds
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- 1 Intro
- 2 CLOUD THREAT VECTORS
- 3 HARDWARE-BASED CLOUD WORKLOAD ISOLATION EVOLUTION
- 4 INTEL TDX-HIGH LEVEL SECURITY GOAL OF ARCHITECTURE
- 5 CPU ISA
- 6 VMX AND SEAM
- 7 THREAT MODEL
- 8 TD MEMORY CONFIDENTIALITY
- 9 TD MEMORY INTEGRITY
- 10 PRIVATE KEY MANAGEMENT
- 11 HW ADDRESS TRANSLATION
- 12 PHYSICAL MEMORY MANAGEMENT
- 13 ATTESTATION LEVERAGES INTEL SGX
- 14 THREAT COVERAGE - SOFTWARE ADVERSARY ATTACKS
- 15 THREAT COVERAGE - HARDWARE ADVERSARY ATTACKS
- 16 THREAT COVERAGE-TOX MODULE AND ATTESTATION ATTACKS
- 17 THREAT COVERAGE - SIDECHANNEL ATTACKS
- 18 INTEL TDX -PUTTING IT ALL TOGETHER
- 19 INTEL TDX SOFTWARE IMPLICATIONS
- 20 INTEL TDX-SW DEPLOYMENT MODELS
- 21 KVM TOUCHPOINTS
- 22 MORE ON MMU
- 23 LINUX TD GUEST TOUCHPOINTS
- 24 GHCI (GUEST-HYPERVISOR COMMUNICATION INTERFACE)
- 25 INTEL TDX PLATFORM AND SW LIFECYCLE
- 26 SUMMARY
