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The Power Management Controller
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Classroom Contents
Intel Management Engine Deep Dive
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- 1 Intro
- 2 Outline
- 3 About the ME
- 4 About ME
- 5 Working with ME firmware images
- 6 Understanding the ME: Firmware Partitions
- 7 Understanding the ME: Code partitions
- 8 Understanding the ME: Metadata
- 9 Code verification chain
- 10 ME shared libraries
- 11 Analysing a simple module
- 12 Data sections
- 13 Example driver main() function
- 14 Trace output: SVEN
- 15 ME driver overview device files
- 16 Accessing hardware
- 17 Message Passing: Basics
- 18 Memory Grants: Indirect Grants
- 19 DMA Locks
- 20 Understanding the address space
- 21 The bus driver: busdrv
- 22 The table in human readable form
- 23 Processor
- 24 Custom host bridge: Minute IA System Agent
- 25 Hardware Cryptographic Accelerator IP blocks (partial)
- 26 Crypto: DMA Engines
- 27 Host-Embedded Controller Interface (HECI)
- 28 Primary Address Translation Table
- 29 Root spaces
- 30 Sideband Fabric
- 31 Developing an exploit for CVE-2017-5705,6,7
- 32 meloader: WINE for the ME
- 33 meloader as a debugger
- 34 Getting JTAG access
- 35 ME Boot Process
- 36 Host Boot Process: Boot Guard
- 37 The Power Management Controller
- 38 Host Initialization: ME tasks
- 39 Getting to the minimal viable implementation
- 40 Boot Guard Configuration
- 41 Future goals
- 42 Acknowledgements
