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Hardware Synthesis - I
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Classroom Contents
Embedded Systems Design
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- 1 Introduction
- 2 Processors
- 3 General Purpose and ASIPs Processor
- 4 Designing a Single Purpose Processor
- 5 Optimization Issues
- 6 Introduction to FPFA
- 7 FPGA Contd.
- 8 Behaviour Synthesis on FPGA using VHDL
- 9 Tutorial - I
- 10 Tutorial - II
- 11 Tutorial - III
- 12 Tutorial - IV
- 13 Sensors and Signals
- 14 Discretization of Signals and A/D Converter
- 15 Quantization Noise, SNR and D/A Converter
- 16 Arduino Uno
- 17 Arduino Uno (Contd.), Serial Communication and Timer
- 18 Controller Design using Arduino
- 19 Tutorial - V
- 20 Power Aware Embedded System - I
- 21 Power Aware Embedded System - II
- 22 SD and DD Algorithm
- 23 Parallel Operations and VLIW
- 24 Code Efficiency
- 25 DSP Application and Address Generation Unit
- 26 Real Time O.S - I
- 27 Real Time O.S - II
- 28 RMS Algorithm
- 29 EDF Algorithm and Resource Constraint Issue
- 30 Priority Inversion and Priority Inheritance Protocol
- 31 Modeling and Specification - I
- 32 Modeling and Specification - II
- 33 FSM and Statechart
- 34 Statechart and Statemate Semantics
- 35 Statecharts (Contd.)
- 36 PROGRAM STATE MACHINES
- 37 SDL
- 38 Data Flow Model - I
- 39 Data Flow Model - II
- 40 Hardware Synthesis - I
- 41 Hardware Synthesis - II
- 42 Scheduling
- 43 Digital Camera Design
- 44 Digital Camera - Iterative Design
- 45 HW-SW Partitioning
- 46 Optimization - I
- 47 Optimization - II
- 48 Simulation
- 49 Formal Verification
